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The problem is to monitor available spacesin a (a+g+h)-space parking garage and provide an indication
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The problem is to monitor available spaces in a (a+g+h)-space parking garage and provide an indication of a “FULL” by illuminating a display sign in a display along with driving a “Gate control” motor. From the figure below, two sensors from the entrance and exit will be connected to the counter circuit to count (i.e., the clock is synchronized with the sensors) and it will be placed into the register according to the binary bit value. Now, a keypad is used to provide your maximum available space. When the spaces are all filled up and the count is full, then the display will show the “Full” indication until the space is empty, and at the same time, the entrance gate control will turn on the “Gate Control” motor.
Your task is to:
i. Outline the essential steps in the correct sequence to develop a block diagram for designing an automated parking control system. This system should include an actuated gate mechanism, a “FULL” indication using a display, and a counter circuit. In addition, design the counter circuit which is capable of simultaneous UP/DOWN counting (Hint: Check chapter 9, page 515 and page 525 of the textbook “Digital Fundamentals” (ELEVENTH EDITION) by Thomas L. Floyd). Include additional sequential and combinational logic components, if required, to ensure smooth control and operation, providing appropriate reasoning for selecting these components.
ii. Design the timer circuit 1 and the timer circuit 2 with a suitable frequency based on your requirement, in which the capacitor value will be C=(c⋅g+20)μF. Identify the limitations of the designed system and analyze the impact of increasing the number of parking spaces on its performance.
iii. Design the function (a+c′⋅e+g⋅h′) of your display using CMOS technology.
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designing an automated parking control system. This system should include an actuated gate mechanism, a “FULL” indication using a seven-segment display, and a counter circuit. In addition, Design the counter circuit which is capable of simultaneous UP/DOWN counting. Include additional sequential and combinational logic components, if required, to ensure smooth control and operation, providing appropriate reasoning for selecting these components. ii. Design the timer circuit 1 and the timer circuit 2 with a suitable frequency based on your requirement, in which the capacitor value will be C = (c*g+20) µF. Identify the limitations of the designed system and analyze the impact of increasing the number of parking spaces on its performance. iii. Design the functions of your seven-segment display using CMOS technology to represent one of the letters in the word “FULL”. – Num Engineering
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